To signal condition J in the current processor one may
which bumps the counter J=1,2,...,NCD contained
in the support variables.
The first or the last counter are bumped for
underflow or overflow in J.
NCD, the number of counters available in the SV bank,
is normally 10.
If more are needed the extra features of JZIN have
to be used,
as explained in section 
.